Venu Nayar 973 Edenbury Lane, San Jose, CA 95136    Ÿ (408) 375-1131    Ÿ (408) 264-0280    Ÿ venu@nayar.org PROFILE
Strong leadership and business skills gained leading global teams, delivering products, and developing solutions for a variety of industries. Successful track record of creating and managing highly motivated and cohesive teams to deliver product against aggressive schedules. Extensive experience identifying strategic market segments, defining market requirements, and developing the organizational consensus necessary to successfully execute the strategy.
WORK EXPERIENCE
2008 - date		Woven Systems, Santa Clara, CA Director of Platform Software Woven Systems is the first company to invent and implement a way to connect servers in a data center using standard Ethernet. Since Ethernet is not designed for low latency and high availability, Woven has invented a scheme so that their switches provide these features in the data center. Woven Systems has been the first company whose switches are used in large data center clusters to provide high performance. Director of Platform Software spearheading architecture for the challenges involved in treating an Ethernet mesh as a single unified fabric without using any proprietary protocols, so that the Woven fabric will interact correctly with an existing network. Strategy · As a key member of the engineering management team, participated in business development and partnership discussions to best use limited engineering resources to maximize penetration in the data center switching market. · Strategized the next generation architecture of the switch software for enterprise networks. Design · Lead the first design and architectural effort to support the Ethernet mesh as a unified fabric, with a single point of control across multiple switches to allow the entire fabric to be managed as a single switch. · Oversaw the architecture of the platform abstraction layer to support Ethernet L2 protocols with high availability for a large distributed fabric across the two diverse product lines. Operations · Managed the design, development and release of platform software for two parallel product lines with the goals of using one common networking application and management software. · Remotely managed an off-shore development center based out of Beijing, China to reduce the design and implementation costs of software across multiple platforms. · Created a software development process to best utilize small local engineering team with the larger team in Beijing. Used a process based on waterfall method of development for features along with timed releases. Drew from the Agile development model and RUP to create a staged feature model.
2006 – 2008		Brocade Communications Systems, San Jose, CA Principal Software Architect Brocade is the industry leader in designing storage switches for SANs. Primary role in leading the architecture and design of the software framework and system infrastructure for a switch designed to integrate Ethernet and Fibre Channel using FCoE in a data center. This allows for unified manageability, system availability, and associated costs. Strategy · Participated in the executive cross-functional panel discussions required to architect the next generation data center switching product line to place Brocade in the Data Center Ethernet market and expand the market segment to include networking. · Managed the architecture and design of  the management scheme required to seamlessly control both FC and Ethernet switches and handle the requirements of two different operating organizations. Design · Managed the architecture and implementation of the software framework for a specialized TCP offload engine to support iSCSI in Brocade’s existing line storage switches. · Lead the architecture to integrate FCoE as a blade into Brocade’s new line integrated network and storage switches. · Lead the architecture of the next generation platform and high availability software for the data center Ethernet switch. · Lead global software teams based out of Bangalore, India and San Jose to successfully implement the management scheme of the integrated network and storage switch.
2002 – 2006		Integrated Device Technology, Santa Clara, CA Principal Engineer Integrated Device Technology is an industry leader involved in making integrated circuits for the networking equipment market. Principal engineer involved with identifying strategic trends in networking products, architecting and defining new product lines for IDT. Lead the architecture and design of the software framework required to integrate IDT’s line of networking co-processors required to offload software intensive processing from Network Processors. Strategy · Worked on five years strategic plan for wire-line networking equipment by researching this market segment to identify areas where IDT can create semiconductors providing significant value to our customers. · Represented IDT in the Network Processing Forum, an industry group of network semi-conductor and equipment vendors defining a set of hardware-independent software APIs, which, if realized, will standardize the interfaces between different software layers inside network equipment and significantly reduce the development cycles for networking equipment. Design · Managed architecture and design plans to identify ways to use the NSE and classifier for new applications such as firewalls, storage switches, scheduling applications, and traffic shaping, and expand IDT’s market penetration. · Invented and enhanced algorithms to optimize use of the networks search co-processors and content classifier chips in networking equipment such as routers, firewalls, web-switches and content-aware networking equipment.
1999 – 2002		Pluris, Cupertino, CA Lead Engineer Pluris was a late-stage startup involved in the design and manufacture of highly available terabit routers. These routers were large, scalable, distributed systems than spanned up to 128 chassis and were connected using an optical backplane. Responsible for the leading the architecture of the system fault tolerance software as well as fault tolerance in the MPLS protocol. · Managed the architecture and implementation of system software components required to support both 1:1 and 1:N redundancy on a highly available, distributed router. These modules implement software distribution and re-scheduling upon failover across multiple control hardware platforms, load balancing, and fault handling on a large distributed system. · Managed the design and implementation of high availability into the MPLS stack and the traffic management database. · Invented a scheme for RSVP fault tolerance in the MPLS stack against an aggressive deadline. · Designed debugging schemes to set breakpoints across a range of addresses/data on a PPC860 emulation platform, back-tracing of inter-task communications on a distributed platform,  attach standard input and output to a subsidiary card using the system backplane,. · Implemented MPLS fast re-route for RSVP tunnels, traffic engineering database, SPF calculation and MPLS datapath drivers. · Implemented VxWorks BSPs for a PPC 604 based line card and on PPC 860 emulation platforms. Wrote start-up code for the CPU, system controller and other peripheral devices on the board. Supported hardware teams with board bring-up.
1994 – 1999		Cabletron Systems, Santa Clara, CA Systems Architect Member of the start-up team of engineers in ZeitNet, a company specializing in ATM equipment, which got acquired by Cabletron Systems, and subsequently became Riverstone Networks. · Managed a team of 6 engineers to bring the system software for two generations of ATM switches to market on time. · Represented Zeitnet at the ATM Forum as well as IEEE 1394 Forum. · Lead the architecture and implementation of platform abstraction layers for ATM protocols to communicate in a portable fashion with switch fabric device drivers. · Managed the architecture and implementation of fault tolerance for a 1+1 redundant system on the second generation ATM switch. · Implemented VxWorks BSPs, device drivers and boot software for switch hardware designed on the Intel i960 and MIPS R4000 processors. · Firmware lead for the group of 5 engineers involved in designing an Ethernet to ATM uplink.
1990 – 1994		Cirrus Logic, Fremont, CA Sr. Firmware Engineer · Represented Cirrus Logic at SCSI standards meetings. · Architected and developed a test framework to check protocol conformance of the SCSI product line. · Designed and implemented the caching scheme for hard disks reducing seek and access times. · Part of team defining a specialized instruction set for an intelligent storage controller.
1988 – 1990		Processor Systems, Bangalore, India Design Engineer · Ported a TCP/IP and a PPP stack to an intelligent active hub. Implemented a HDLC driver, a serial driver and the memory allocation mechanism to support the applications. · Designed and implemented the firmware for a caching SCSI disc controller running on an EISA bus.
TECHNICAL SKILLS
· Embedded system architecture and design on both Linux and VxWorks platforms. · Fault tolerant and distributed system software design in large loosely distributed clusters. · Extensive algorithm design · Network processor and micro-code experience · Extensive Protocol Implementation: MPLS, ATM, SCSI, IDE, 1394, FC, FCoE · Ported VxWorks real-time operating system board support packages on multiple platforms · Embedded kernel debugging tools, system diagnostic software and debug monitors			· Low-level microprocessor control and start-up (boot) code: PPC 604, PPC 860, MIPS R4000, Intel i960, Intel x86, Motorola 68000 · Extensive experience with device drivers · Peripheral Devices: Custom ASICs, SCSI controllers (NCR 53C9x, 53C700), ATM SARs (NEC, TI), System Controllers (Galileo, PCI, Memory), Ethernet and serial controllers · Expert in prototype bring-up and debugging · Proficient in using Logic Analyzers and In-circuit Emulators for debugging systems
EDUCATION
	Birla Institute of Technology, Ranchi, India BS, Electrical Engineering